5.1.2. PMA/FEC Direct PHY Multirate Hardware Design Example
I the hadwae desig example, the ISSP modules cotol the DUT IP eset sigals, d_mode selectio ad shows the status sigals. The hadwae test scipts ope sevice to the ISSP to ead ad dive the values. A JTAG host is istatiated to access the Avalo® memoy-mapped iteface.
The hadwae desig example executes the dyamic ecofiguatio tasitio pocess based o use selectio as stated i sc/paamete.tcl file ad checks the DUT IP status. Thee is a default dyamic ecofiguatio tasitio sequece, but use ca always modify the DR_TRANSITION aay vaiable i sc/paamete.tcl file.
DR_TRANSITION: Iteded DR sequece aay, size of this aay vaiable detemies the umbe of dyamic ecofiguatio to be pefomed.
- Fo example, if you wat to achieve the followig dyamic ecofiguatio sequece fo 50G-1 Base Vaiat: 1x50G > 1x25G > 1x50G KPFEC > 1x24.33024G > 1x50G, the vaiables chages ae:
set DR_TRANSITION(0) "1x25G" set DR_TRANSITION(1) "1x50G KPFEC" set DR_TRANSITION(2) "1x24.33024G" set DR_TRANSITION(3) "1x50G
- If you wat to achieve the followig dyamic ecofiguatio sequece fo 400G-8 Base Vaiat: 1x400G-8 > 2x100G-4 > 2x200G-4 > 1x400G-8G, the vaiables chages ae:
The vaiables chages ae: set DR_TRANSITION(0) "2x100G_4" set DR_TRANSITION(1) "2x200G_4" set DR_TRANSITION(2) "1x400G_8"
Hadwae Flow fo Desig Example:
The PMA/FEC Diect Multiate PHY Desig Example us the exteal loopback test by default with the loopback_mode paamete set to 0. Befoe pefomig ay hadwae test, attach the QSFP-DD loopback module accodig to the QSF piout assigmets of the espective desig example.
To pefom a iteal loopback test i hadwae, modify the loopback_mode paamete to 1 i the paamete.tcl file located i <desig_example_di>/hadwae_test_desig/hwtest/sc. Afte you compile the F-Tile dyamic ecofiguatio desig example ad cofigue it o you Agilex™ 7 device, you ca use the System Cosole to pogam the IP coe ad its PHY IP coe egistes.
About this task:
To stat the System Cosole ad test the hadwae desig example, follow these steps:
- Afte the hadwae desig example is cofigued o the Agilex™ 7 device, i the Itel Quatus Pime Po Editio softwae, click .
- I the Tcl Cosole pae, type cd hwtest to chage diectoy to <desig_example_di>/hadwae_test_desig/hwtest.
- Type souce mai_scipt.tcl to ope a coectio to the JTAG maste ad stat the test.
- Aalyze the esults. Successful u displays Test Passed i the System Cosole.
The sample output fo the PMA/FEC Diect PHY Multiate hadwae desig examples is show below.
% cd hwtest $souce mai_scipt.tcl Ifo: Numbe of Chaels = 1 Ifo: JTAG Pot ID = 2 Ifo: Powe Up Vaiat = 1x50G INFO: Stat of ftile_dphy_d_test_dyamic INFO: Basic DPHY DR test INFO: Set Recofig Reset INFO: wite_value is 0x1 INFO: Release Recofig Reset INFO: wite_value is 0x0 INFO: Set DR mode... INFO: DR mode is 0x0 ........... ******* ******* INFO: Chael 0: Set TX Reset INFO: wite_value is 0x4 INFO: Chael 0: Set RX Reset INFO: wite_value is 0x6 INFO: get_eset_ack_status ----- INFO: Chael 0 : Checkig tx eset ack status... INFO: tx_eset_ack_status_0 = 0x3 INFO: TX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_0 = 0x3 INFO: RX fully i eset state INFO: Stat DR selectio----- INFO: DR tasitio is 1x50G ----- INFO: Chael: 0 Cofiguig ED to PMA_DIR 1x50G .... INFO: Wait fo DR Ready.... INFO: cofiguig DR Pofile 1x50G.... INFO: Tigge DR iteupt INFO: Wait fo DR iteupt Ack.... INFO: DR Request ackowledged INFO: Wait fo DR Cofig to be doe.... INFO: DONE Recofigue to 1x50G. INFO: Set DR mode... INFO: DR mode is 0x0 INFO: Chael 0: Release TX Reset INFO: wite_value is 0x2 INFO: Chael 0: Release RX Reset INFO: wite_value is 0x0 INFO: Chael 0 : Ru test... INFO: Read out pobe data: 0x7dc INFO: Data locked with o eo ******* ******* Ifo: Ed of ftile_dphy_d_test Ifo: Test <ftile_dphy_d_test> Passed
% cd hwtest $souce mai_scipt.tcl Ifo: Numbe of Chaels = 1 Ifo: JTAG Pot ID = 2 Ifo: Powe Up Vaiat = 1x400G_8 INFO: Stat of ftile_dphy_d_test INFO: Basic DPHY DR test INFO: Set Recofig Reset INFO: wite_value is 0x1 INFO: Release Recofig Reset INFO: wite_value is 0x0 INFO: Set DR mode... INFO: DR mode is 0x0 INFO: Chael 0: Set TX Reset INFO: wite_value is 0x4 INFO: Chael 0: Set RX Reset INFO: wite_value is 0x6 INFO: check_eset_ack__status fo cuet_d_pofile : 400G ----- INFO: Chael 0 : Checkig tx eset ack status... INFO: tx_eset_ack_status_0 = 0x5 INFO: TX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_0 = 0x5 INFO: RX fully i eset state INFO: Iteal Seial Loopback ot eabled INFO: Chael 0: Release TX Reset INFO: wite_value is 0x2 INFO: Chael 0: Release RX Reset INFO: wite_value is 0x0 Ru default test. Release esets. Ruig test fo 10s INFO: Chael 0 : Ru test... INFO: Read out pobe data: 0x6b70 INFO: Chael 0: Set TX Reset INFO: wite_value is 0x4 INFO: Chael 0: Set RX Reset INFO: wite_value is 0x6 INFO: check_eset_ack__status fo cuet_d_pofile : 400G ----- INFO: Chael 0 : Checkig tx eset ack 0 status... INFO: tx_eset_ack_status_0 = 0x5 INFO: TX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_0 = 0x5 INFO: RX fully i eset state INFO: Stat DR selectio----- INFO: DR tasitio is 2x200G_4 ----- INFO: Chael: 0 Cofiguig ED to PMA_DIR 2x200G_4 .... INFO: Wait fo DR Ready.... INFO: cofiguig DR Pofile 2x200G_4.... INFO: Tigge DR iteupt INFO: Wait fo DR iteupt Ack.... INFO: DR Request ackowledged INFO: Wait fo DR Cofig to be doe.... INFO: DONE Recofigue to 2x200G_4. INFO: Set DR mode... INFO: DR mode is 0x1 INFO: Chael 0: Release TX Reset INFO: wite_value is 0x2 INFO: Chael 0: Release RX Reset INFO: wite_value is 0x0 INFO: Chael 0 : Ru test... INFO: Read out pobe data: 0x7f70 INFO: Data locked with o eo INFO: Test Pass! ******* ******* INFO: Chael 0: Set TX Reset INFO: wite_value is 0x4 INFO: Chael 0: Set RX Reset INFO: wite_value is 0x6 INFO: check_eset_ack__status fo cuet_d_pofile : 200G ----- INFO: Chael 0 : Checkig tx eset ack 0 status... INFO: tx_eset_ack_status_0 = 0xf INFO: TX fully i eset state INFO: Chael 0 : Checkig tx eset ack 1 status... INFO: tx_eset_ack_status_1 = 0xf INFO: TX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_0 = 0xf INFO: RX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_1 = 0xf INFO: RX fully i eset state INFO: Stat DR selectio----- INFO: DR tasitio is 2x100G_4 ----- INFO: Chael: 0 Cofiguig ED to PMA_DIR 2x100G_4 .... INFO: Wait fo DR Ready.... INFO: cofiguig DR Pofile 2x100G_4.... INFO: Tigge DR iteupt INFO: Wait fo DR iteupt Ack.... INFO: DR Request ackowledged INFO: Wait fo DR Cofig to be doe.... INFO: DONE Recofigue to 2x100G_4. INFO: Set DR mode... INFO: DR mode is 0x2 INFO: Chael 0: Release TX Reset INFO: wite_value is 0x2 INFO: Chael 0: Release RX Reset INFO: wite_value is 0x0 INFO: Chael 0 : Ru test... INFO: Read out pobe data: 0x7f70 INFO: Data locked with o eo INFO: Test Pass! ******* ******* INFO: Chael 0: Set TX Reset INFO: wite_value is 0x4 INFO: Chael 0: Set RX Reset INFO: wite_value is 0x6 INFO: check_eset_ack__status fo cuet_d_pofile : 100G ----- INFO: Chael 0 : Checkig tx eset ack 0 status... INFO: tx_eset_ack_status_0 = 0xf INFO: TX fully i eset state INFO: Chael 0 : Checkig tx eset ack 1 status... INFO: tx_eset_ack_status_1 = 0xf INFO: TX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_0 = 0xf INFO: RX fully i eset state INFO: Chael 0 : Checkig x eset ack status... INFO: x_eset_ack_status_1 = 0xf INFO: RX fully i eset state INFO: Stat DR selectio----- INFO: DR tasitio is 1x400G_8 ----- INFO: Chael: 0 Cofiguig ED to PMA_DIR 1x400G_8 .... INFO: Wait fo DR Ready.... INFO: cofiguig DR Pofile 1x400G_8.... INFO: Tigge DR iteupt INFO: Wait fo DR iteupt Ack.... INFO: DR Request ackowledged INFO: Wait fo DR Cofig to be doe.... INFO: DONE Recofigue to 1x400G_8. INFO: Set DR mode... INFO: DR mode is 0x0 INFO: Chael 0: Release TX Reset INFO: wite_value is 0x2 INFO: Chael 0: Release RX Reset INFO: wite_value is 0x0 INFO: Chael 0 : Ru test... INFO: Read out pobe data: 0x6b70 INFO: Data locked with o eo INFO: Test Pass! ******* ******* Ifo: Ed of ftile_dphy_d_test Ifo: Test <ftile_dphy_d_test> Passed