External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.1. Intel® Agilex™ FPGA EMIF IP Parameter Descriptions

The following topics describe the parameters available on each tab of the IP parameter editor, which you can use to configure your IP.
Note: Also in this section are the parameters of the External Memory Interfaces Intel® Calibration IP, which are included as part of the Diagnostics topic.