External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.2. Intel® Agilex™ EMIF Sequencer

The Intel® Agilex™ EMIF sequencer is fully hardened in silicon, with executable code to handle protocols and topologies. Hardened RAM contains the calibration algorithm.

The Intel® Agilex™ EMIF sequencer is responsible for the following operations:

  • Initializes memory devices.
  • Calibrates the external memory interface.
  • Governs the hand-off of control to the memory controller.
  • Handles recalibration requests and debug requests.
  • Handles all supported protocols and configurations.
Figure 30.  Intel® Agilex™ EMIF Sequencer Operation