External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 10/04/2021
Public

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Document Table of Contents

6. Intel® Agilex™ FPGA EMIF IP – DDR4 Support

This chapter contains IP parameter descriptions, board skew equations, pin planning information, and board design guidance for Intel® Agilex™ FPGA external memory interface IP for DDR4.