External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.1.1.11. afi_half_clk for DDR4

AFI half-rate clock interface

Table 24.  Interface: afi_half_clkInterface type: Clock Output
Port Name Direction Description
afi_half_clk Output Clock running at half the frequency of the AFI clock afi_clk