Visible to Intel only — GUID: mwh1410471051648
Ixiasoft
1.1.2.1. Specify Instance-Specific Constraints in Assignment Editor
1.1.2.2. Specifying Multi-Dimensional Bus Constraints
1.1.2.3. Specify I/O Constraints in Pin Planner
1.1.2.4. Plan Interface Constraints in Interface Planner and Tile Interface Planner
1.1.2.5. Adjust Constraints with the Chip Planner
1.1.2.6. Constraining Designs with the Design Partition Planner
Visible to Intel only — GUID: mwh1410471051648
Ixiasoft
3.4. Validating Pin Assignments
The Intel® Quartus® Prime software validates I/O pin assignments against predefined I/O rules for your target device. You can use the following tools to validate your I/O pin assignments throughout the pin planning process:
I/O Validation Tool |
Description |
Click to Run |
---|---|---|
Advanced I/O Timing |
Fully validates I/O assignments against all I/O and timing checks during compilation |
Processing > Start Compilation |