Visible to Intel only — GUID: jbr1459270419094
Ixiasoft
Visible to Intel only — GUID: jbr1459270419094
Ixiasoft
2.1.2.4.1. Plan Clock Networks
Interface Planner generates a Clocks report that details the signals using low-skew routing networks (clock networks) in the device.
To identify and place clocking elements in your design, click the Clocking filter in the Plan tab. You can refine the list further by entering search text in the Design Element Filter. Interface Planner represents clock networks as groupings of the following clock network elements:
- Clock source
- Clock mux
- Clock region
You can place an entire clock group or individual clock elements by dragging into the location, or using the Report Legal Locations of Selected Element or the Autoplace Selected commands. After placement, hover the cursor over the item in the Design Element list to highlight the placement. The placement of clock elements impacts the placement of dependent core and periphery elements.
You can edit the clock type for clocking design elements. The clock type impacts the placement of dependent core and periphery elements. Right-click any clock element to specify one of the following clock types:
- Not Set
- Locally Routed
- Global
- Large Periphery
- Periphery
- Regional