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1.1.2.1. Specify Instance-Specific Constraints in Assignment Editor
1.1.2.2. Specifying Multi-Dimensional Bus Constraints
1.1.2.3. Specify I/O Constraints in Pin Planner
1.1.2.4. Plan Interface Constraints in Interface Planner and Tile Interface Planner
1.1.2.5. Adjust Constraints with the Chip Planner
1.1.2.6. Constraining Designs with the Design Partition Planner
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2.1.3.4. Report Clocks
Generate reports showing clock networks in the plan. Use this report to analyze clock network scenarios and ensure that specific device regions are fed by high fan-out signals.
Command | Description |
---|---|
Report Clocks | Generates the Global and other Fast Signals report. |
Figure 20. Clocks Report