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1.1.2.1. Specify Instance-Specific Constraints in Assignment Editor
1.1.2.2. Specifying Multi-Dimensional Bus Constraints
1.1.2.3. Specify I/O Constraints in Pin Planner
1.1.2.4. Plan Interface Constraints in Interface Planner and Tile Interface Planner
1.1.2.5. Adjust Constraints with the Chip Planner
1.1.2.6. Constraining Designs with the Design Partition Planner
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2.1.3.2. Report Pins
Generate reports about I/O pins in the design. Right-click any cell type to place, unplace, or report connectivity or location information.
Command | Description |
---|---|
Report All Placed Pins | Generates the Placed Pins report. This report lists the name, parent, type, and location of all placed pins in the interface plan. |
Report All Unplaced Pins | Generates the Unplaced Pins report. This report lists the name, parent, type, and the number of potential placements for all unplaced pins in the interface plan. |
Figure 17. Placed Pins Report
Figure 18. Unplaced Pins Report