Questa* Intel® FPGA Edition Simulation User Guide

ID 730191
Date 4/01/2024
Public
Document Table of Contents

2.3.3.2. Running the Simulation Library Compiler in a Terminal

You can run the Quartus® Prime Simulation Library Compiler in a terminal without launching the Quartus® Prime software GUI.

The following example command generates the Questasim compile.do simulation script that compiles all Verilog HDL simulation files for the specified Agilex™ 7 device family.

quartus_sh –simlib_comp -family agilex7 -tool questasim \
     -language verilog -gen_only -cmd_file compile.do

To view all available command-line options, you can run the following command:

quartus_sh --help=simlib_comp