Agilex™ 7 LVDS SERDES User Guide: F-Series and I-Series

ID 721819
Date 9/05/2024
Public
Document Table of Contents

10. Documentation Related to the Agilex™ 7 LVDS SERDES User Guide: F-Series and I-Series

Table 38.  LVDS SERDES ReferencesThe links in this table are references related to the Agilex™ 7 F-Series and I-Series LVDS SERDES system.
Reference Description
Agilex™ 7 FPGAs and SoCs Device Data Sheet: F-Series and I-Series

Lists the electrical characteristics, switching characteristics, configuration specifications, and timing for F-Series and I-Series devices.

Agilex™ 7 Device Family Pin Connection Guidelines

Provides guidelines for all pins in Agilex™ 7 devices.

Agilex™ 7 General-Purpose I/O User Guide: F-Series and I-Series

Describes features, functional descriptions, implementation guidelines, and restrictions on general-purpose I/O system in F-Series and I-Series devices.

Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series

Describes the F-Series and I-Series devices clock and PLL specifications and guidelines.

Agilex™ 7 Configuration User Guide

Describes the Agilex™ 7 configuration specifications and guidelines.

Agilex™ 7 Power Management User Guide Describes the F-Series and I-Series devices power management specifications and guidelines.
IBIS Models for Intel FPGA Devices

Provides IBIS models for Agilex™ 7 devices.

AN 433: Constraining and Analyzing Source-Synchronous Interfaces Describes techniques for constraining and analyzing source-synchronous interfaces.
LVDS SERDES Intel® FPGA IP Release Notes Lists the changes made in each release of the LVDS SERDES Intel® FPGA IP.