Intel Cyclone 10 LP Device Design Guidelines

ID 683861
Date 3/28/2019
Public
Document Table of Contents

Power Pin Connections and Power Supplies

Table 22.  Power Pin Connections and Power Supplies Checklist
Number Done? Checklist Item
1   Connect all power pins correctly as specified in the Intel® Cyclone® 10 LP Device Family Pin Connection Guidelines.
2   Connect VCCIO pins and VREF pins to support each bank’s I/O standards.
3   Explore unique requirements for FPGA power pins or other power pins on your board, and determine which devices on your board can share a power rail.
4   Follow the suggested power supply sharing and isolation guidance, and the specific guidelines for each pin in the Intel® Cyclone® 10 LP Device Family Pin Connection Guidelines.

Intel® Cyclone® 10 LP devices support a wide range of industry I/O standards. The device output pins do not meet the I/O standard specifications if the VCCIO level is out of the recommended operating range for the I/O standard.

Voltage reference (VREF) pins serve as voltage references for certain I/O standards. The VREF pin is used mainly for a voltage bias and does not source or sink much current. The voltage can be created with a regulator or a resistor divider network.