Intel Cyclone 10 LP Device Design Guidelines

ID 683861
Date 3/28/2019
Public
Document Table of Contents

PLLs and Clock Routing

Table 6.  PLLs and Clock Routing Checklist
Number Done? Checklist Item
1   Verify the number of PLLs and clock resources.

Verify that your chosen device density package combination includes enough PLLs and clock routing resources for your design.