Visible to Intel only — GUID: kly1463119730678
Ixiasoft
Visible to Intel only — GUID: kly1463119730678
Ixiasoft
8.6.4. Preadder Tab
Parameter | IP Generated Parameter | Value | Default Value | Description |
---|---|---|---|---|
Select preadder mode | preadder_mode | SIMPLE, COEF, INPUT, SQUARE, CONSTANT |
SIMPLE | Specifies the operation mode for preadder module. SIMPLE: This mode bypass the preadder. This is the default mode. COEF: This mode uses the output of the preadder and coefsel input bus as the inputs to the multiplier. INPUT: This mode uses the output of the preadder and datac input bus as the inputs to the multiplier. SQUARE: This mode uses the output of the preadder as both the inputs to the multiplier. CONSTANT: This mode uses dataa input bus with preadder bypassed and coefsel input bus as the inputs to the multiplier. |
Select preadder direction | gui_preadder_direction | ADD, SUB |
ADD | Specifies the operation of the preadder.
To enable this parameter, select the following for Select preadder mode:
|
How wide should the C input buses be? | width_c | 1 - 256 | 16 | Specifies the number of bits for C input bus. You must select INPUT for Select preadder mode to enable this parameter. |
Data C Input Register Configuration | ||||
Register datac input | gui_datac_input_register | On Off |
On | Select this option to enable input register for datac input bus. You must set INPUT to Select preadder mode parameter to enable this option. |
What is the source for clock input? | gui_datac_input_register_clock | Clock0 Clock1 Clock2 |
Clock0 | Select Clock0 , Clock1 or Clock2 to specify the input clock signal for datac input register. You must select Register datac input to enable this parameter. |
What is the source for asynchronous clear input? | gui_datac_input_register_aclr | NONE ACLR0 ACLR1 |
NONE | Specifies the asynchronous clear source for the datac input register. You must select Register datac input to enable this parameter. |
What is the source for synchronous clear input? | gui_datac_input_register_sclr | NONE SCLR0 SCLR1 |
NONE | Specifies the synchronous clear source for the datac input register. You must select Register datac input to enable this parameter. |
Coefficients | ||||
How wide should the coef width be? | width_coef | 1 - 27 | 18 | Specifies the number of bits for coefsel input bus. You must select COEF or CONSTANT for preadder mode to enable this parameter. |
Coef Register Configuration | ||||
Register the coefsel input | gui_coef_register | On Off |
On | Select this option to enable input register for coefsel input bus. You must select COEF or CONSTANT for preadder mode to enable this parameter. |
What is the source for clock input? | gui_coef_register_clock | Clock0 Clock1 Clock2 |
Clock0 | Select Clock0 , Clock1 or Clock2 to specify the input clock signal for coefsel input register. You must select Register the coefsel input to enable this parameter. |
What is the source for asynchronous clear input? | gui_coef_register_aclr | NONE ACLR0 ACLR1 |
NONE | Specifies the asynchronous clear source for the coefsel input register. You must select Register the coefsel input to enable this parameter. |
What is the source for synchronous clear input | gui_coef_register_sclr | NONE SCLR0 SCLR1 |
NONE | Specifies the synchronous clear source for the coefsel input register. You must select Register the coefsel input to enable this parameter. |
Coefficient_0 Configuration | coef0_0 to coef0_7 | 0x00000 – 0xFFFFFFF | 0x00000000 | Specifies the coefficient values for this first multiplier. The number of bits must be the same as specified in How wide should the coef width be? parameter. You must select COEF or CONSTANT for preadder mode to enable this parameter. |
Coefficient_1 Configuration | coef1_0 to coef1_7 | 0x00000 – 0xFFFFFFF | 0x00000000 | Specifies the coefficient values for this second multiplier. The number of bits must be the same as specified in How wide should the coef width be? parameter. You must select COEF or CONSTANT for preadder mode to enable this parameter. |
Coefficient_2 Configuration | coef2_0 to coef2_7 | 0x00000 – 0xFFFFFFF | 0x00000000 | Specifies the coefficient values for this third multiplier. The number of bits must be the same as specified in How wide should the coef width be? parameter. You must select COEF or CONSTANT for preadder mode to enable this parameter. |
Coefficient_3 Configuration | coef3_0 to coef3_7 | 0x00000 – 0xFFFFFFF | 0x00000000 | Specifies the coefficient values for this fourth multiplier. The number of bits must be the same as specified in How wide should the coef width be? parameter. You must select COEF or CONSTANT for preadder mode to enable this parameter. |