Visible to Intel only — GUID: sam1395330068655
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1. Intel FPGA Integer Arithmetic IP Cores
2. LPM_COUNTER (Counter) IP Core
3. LPM_DIVIDE (Divider) Intel FPGA IP Core
4. LPM_MULT (Multiplier) IP Core
5. LPM_ADD_SUB (Adder/Subtractor)
6. LPM_COMPARE (Comparator)
7. ALTECC (Error Correction Code: Encoder/Decoder) IP Core
8. Intel FPGA Multiply Adder IP Core
9. ALTMEMMULT (Memory-based Constant Coefficient Multiplier) IP Core
10. ALTMULT_ACCUM (Multiply-Accumulate) IP Core
11. ALTMULT_ADD (Multiply-Adder) IP Core
12. ALTMULT_COMPLEX (Complex Multiplier) IP Core
13. ALTSQRT (Integer Square Root) IP Core
14. PARALLEL_ADD (Parallel Adder) IP Core
15. Integer Arithmetic IP Cores User Guide Document Archives
16. Document Revision History for Intel FPGA Integer Arithmetic IP Cores User Guide
7.1. ALTECC Encoder Features
7.2. Verilog HDL Prototype (ALTECC_ENCODER)
7.3. Verilog HDL Prototype (ALTECC_DECODER)
7.4. VHDL Component Declaration (ALTECC_ENCODER)
7.5. VHDL Component Declaration (ALTECC_DECODER)
7.6. VHDL LIBRARY_USE Declaration
7.7. Encoder Ports
7.8. Decoder Ports
7.9. Encoder Parameters
7.10. Decoder Parameters
Visible to Intel only — GUID: sam1395330068655
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10.6. Parameters
The following table lists the parameters for the ALTMULT_ACCUM IP core.
Parameter Name | Type | Required | Description |
---|---|---|---|
ACCUM_DIRECTION | String | No | Specifies whether the accumulator performs an add or subtract function. Values are ADD and SUB. When this parameter is set to ADD, the accumulator adds the product to the current accumulator value. When this parameter is set to SUB, the accumulator subtracts the product from the current accumulator value. If omitted the default value is ADD. This parameter is ignored if the addnsub port is used. |
ACCUM_SLOAD_ACLR | String | No | Specifies the asynchronous clear signal for the accum_sload port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. This parameter is ignored if the accum_sload port is unused. |
ACCUM_SLOAD_PIPELINE_ACLR | String | No | Specifies the asynchronous clear signal for the second register on the accum_sload port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. This parameter is ignored if the accum_sload port is unused. |
ACCUM_SLOAD_PIPELINE_REG | String | No | Specifies the clock signal for the second register on the accum_sload port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the accum_sload port is unused. |
ACCUM_SLOAD_REG | String | No | Specifies the clock signal for the accum_sload port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the accum_sload port is unused. |
ADDNSUB_ACLR | String | No | Specifies the asynchronous clear for the addnsub port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR0. This parameter is ignored if the addnsub port is unused. |
ADDNSUB_PIPELINE_ACLR | String | No | Specifies the asynchronous clear for the second register on the addnsub port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR0. This parameter is ignored if the addnsub port is unused. |
ADDNSUB_PIPELINE_REG | String | No | Specifies the clock for the second register on the addnsub port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the addnsub port is unused. |
ADDNSUB_REG | String | No | Specifies the clock for the addnsub port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the addnsub port is unused. |
DSP_BLOCK_BALANCING | String | No | Specifies whether to use DSP block balancing. Values are UNUSED, Auto, DSP blocks, Logic Elements, Off, Simple 18-bit Multipliers, Simple Multipliers, and Width 18-bit Multipliers. |
EXTRA_ACCUMULATOR_LATENCY | String | No | Adds the number of clock cycles of latency specified by the OUTPUT_REG parameter to the accumulator portion of the DSP block. |
EXTRA_MULTIPLIER_LATENCY | Integer | No | Specifies the number of clock cycles of latency for the multiplier portion of the DSP block. If the MULTIPLIER_REG parameter is specified, then the specified clock port is used to add the latency. If the MULTIPLIER_REG parameter is set to UNREGISTERED, then the clock0 port is used to add the latency. |
INPUT_ACLR_A | String | No | Specifies the asynchronous clear port for the dataa[] port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. |
INPUT_ACLR_B | String | No | Specifies the asynchronous clear port for the datab[] port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. |
INPUT_REG_A | String | No | Specifies the clock port for the dataa[] port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. |
INPUT_REG_B | String | No | Specifies the clock port for the datab[] port. Values are UNREGISTERED, CLOCK0, CLOCK1, and CLOCK2. If omitted, the default value is CLOCK0. |
INTENDED_DEVICE_FAMILY | String | No | This parameter is used for modeling and behavioral simulation purposes. The parameter editor calculates the value for this parameter. |
LPM_HINT | String | No | When you instantiate a library of parameterized modules (LPM) function in a VHDL Design File (.vhd), you must use the LPM_HINT parameter to specify an Intel® -specific parameter. For example: LPM_HINT = "CHAIN_SIZE = 8, ONE_INPUT_IS_CONSTANT = YES" The default value is UNUSED. |
LPM_TYPE | String | No | Identifies the library of parameterized modules (LPM) entity name in VHDL design files. |
MULTIPLIER_ACLR | String | No | Specifies the asynchronous clear signal for the register immediately following the multiplier. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. |
MULTIPLIER_REG | String | No | Specifies the clock signal for the register that immediately follows the multiplier. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. |
OUTPUT_ACLR | String | No | Specifies the asynchronous clear signal for the registers on the outputs. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. |
OUTPUT_REG | String | No | Specifies the clock signal for the registers on the outputs. Values are CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted the default value is CLOCK0. You must enable the output registers in order to use accumulator. |
PORT_ADDNSUB | String | No | Specifies the usage of the addnsub input port. Values are: PORT_USED , PORT_UNUSED, and PORT_CONNECTIVITY (port usage is determined by checking the port connectivity.) If omitted the default value is PORT_CONNECTIVITY. |
PORT_SIGNA | String | No | Specifies the usage of the signa input port. Values are PORT_USED, PORT_UNUSED, and PORT_CONNECTIVITY. If omitted the default value is PORT_CONNECTIVITY. |
PORT_SIGNB | String | No | Specifies the usage of the signb input port. Values are PORT_USED, PORT_UNUSED, and PORT_CONNECTIVITY. If omitted the default value is PORT_CONNECTIVITY. |
REPRESENTATION_[] | String | No | Parameter [A,B]. Specifies the numerical representation of the corresponding data[] port. Values are UNSIGNED and SIGNED. When this parameter is set to SIGNED, the accumulator interprets the dataa input as signed two's complement. If omitted, the default value is UNSIGNED. This parameter is ignored if the signa port is used. |
SIGN_ACLR_[] | String | No | Parameter [A,B]. Specifies the asynchronous clear signal for the first register on the corresponding sign[] port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. This parameter is ignored if the corresponding sign[] port is unused. |
SIGN_PIPELINE_ACLR_[] | String | No | Parameter [A,B]. Specifies the asynchronous clear signal for the second register on the corresponding sign[] port. Values are ACLR0, ACLR1, ACLR2, and ACLR3. If omitted the default value is ACLR3. This parameter is ignored if the corresponding sign[] port is unused. |
SIGN_PIPELINE_REG_[] | String | No | Parameter [A,B]. Specifies the clock signal for the second register on the corresponding sign[] port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the corresponding sign[] port is unused. |
SIGN_REG_[] | String | No | Parameter [A,B]. Specifies the clock signal for the first register on the corresponding sign[] port. Values are UNREGISTERED, CLOCK0, CLOCK1, CLOCK2, and CLOCK3. If omitted, the default value is CLOCK0. This parameter is ignored if the corresponding sign[] port is unused. |
WIDTH_A | Integer | Yes | Specifies the width of the dataa[] port. |
WIDTH_B | Integer | Yes | Specifies the width of the datab[] port. |
WIDTH_RESULT | Integer | No | Specifies the width of the result[] port. |
Parameter Name | Type | Required | Description |
---|---|---|---|
DEDICATED_MULTIPLIER_CIRCUITRY | String | No | Specifies whether to use dedicated multiplier circuitry. Values are AUTO, ON, and OFF. If omitted, the default value is AUTO. |
Parameter Name | Type | Required | Description |
---|---|---|---|
MULTIPLIER_SATURATION | String | No | Specifies multiplier saturation. Values are NO, YES, and VARIABLE. If omitted the default value is NO. |