Intel FPGA Integer Arithmetic IP Cores User Guide

ID 683490
Date 10/05/2020
Public

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9.5. Parameters

The following table lists the parameters for the ALTMEMMULT IP core.
Table 39.  ALTMEMMULT Parameters
Parameter Name Type Required Description
WIDTH_D Integer Yes Specifies the width of the data_in[] port.
WIDTH_C Integer Yes Specifies the width of the coeff_in[] port.
WIDTH_R Integer Yes Specifies the width of the result[] port.
WIDTH_S Integer No Specifies the width of the sel[] port.
COEFFICIENT0 Integer Yes Specifies value of the first fixed coefficient.
TOTAL_LATENCY Integer Yes Specifies the total number of clock cycles from the start of a multiplication to the time the result is available at the output.
DATA_REPRESENTATION String No Specifies whether the data_in[] input port and the pre-loaded coefficients are signed or unsigned.
COEFF_REPRESENTATION String No Specifies whether the coeff_in[] input port and the pre-loaded coefficients are signed or unsigned.
INTENDED_DEVICE_FAMILY String No This parameter is used for modeling and behavioral simulation purposes.
LPM_HINT String No

When you instantiate a library of parameterized modules (LPM) function in a VHDL Design File (.vhd), you must use the LPM_HINT parameter to specify an Intel® -specific parameter. For example: LPM_HINT = "CHAIN_SIZE = 8, ONE_INPUT_IS_CONSTANT = YES"

The default value is UNUSED.
LPM_TYPE String No Identifies the library of parameterized modules (LPM) entity name in VHDL design files.
MAX_CLOCK_CYCLES_PER_RESULT Integer No Specifies the number of clock cycles per result.
NUMBER_OF_COEFFICIENTS Integer No Specifies the number of coefficients that are stored in the lookup table.
RAM_BLOCK_TYPE String No Specifies the ram block type. Values are AUTO, SMALL, MEDIUM, M512, and M4K. If omitted, the default value is AUTO.