Stratix® 10 SX SoC Development Kit User Guide

ID 683303
Date 6/06/2024
Public
Document Table of Contents

4.7.5. SDI Port

Table 17.  SDI Port FPGA Pin Map
Pin Name Schematic Signal Name Direction Description
PIN_AF9 CLEARNER_SDI_245MHZ_P Input REFCLK_GXBL4E_CHTP
PIN_AF10 CLEARNER_SDI_245MHZ_N Input REFCLK_GXBL4E_CHTN
PIN_AR4 SDI_TX_N Output GXBR4E_TX_CH1N
PIN_AR3 SDI_TX_P Output GXBR4E_TX_CH1P
PIN_AR8 SDI_RX_N Input GXBR4E_RX_CH0N
PIN_AR7 SDI_RX_P Input GXBR4E_RX_CH0P
PIN_AK12 CLEARNER_SDI_297MHZ_P Input REFCLK_GXBL4F_CHTP
PIN_AK13 CLEARNER_SDI_297MHZ_N Input REFCLK_GXBL4F_CHTN