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Ixiasoft
1.1. Release Information
1.2. Device Family Support
1.3. Parameters
1.4. Mailbox Client Intel® FPGA IP Core Interface Signals
1.5. Mailbox Client Intel FPGA IP Avalon® Memory-Mapped Interface
1.6. Commands and Responses
1.7. Specifying the Command and Response FIFO Depths
1.8. Enabling Cryptographic Services
1.9. Using the Mailbox Client Intel® FPGA IP
1.10. Accessing Quad SPI Flash Mailbox Client Intel FPGA IP Core Use Case Examples
1.11. Nios® II and Nios® V Processors HAL Driver
1.12. Mailbox Client Intel FPGA IP User Guide Archives
1.13. Document Revision History for the Mailbox Client Intel® FPGA IP User Guide
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Ixiasoft
1.3. Parameters
Parameter Name | Value | Description |
---|---|---|
Mailbox Client Intel® FPGA IP Parameters | ||
Command FIFO Depth | 1 - 1024 | Depth of the command FIFO |
Response FIFO Depth | 1 - 1024 | Depth of the response FIFO |
Crypto Memory Timeout Value | 0x00002710 - 0x7FFFFFFFF |
The timeout for the cryptographic service. Specify value within the minimum and maximum timeout value.
|
Memory AXI Manager Parameters | ||
Enable Crypto Service 6 | 0, 1 |
Enables the cryptographic offloading feature. When set, enables the crypto AXI manager interface. |