Mailbox Client Intel® FPGA IPs User Guide

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ID 683290
Date 11/04/2024
Public
Document Table of Contents
Document Table of Contents x
1. Mailbox Client Intel FPGA IP User Guide 2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions
1. Mailbox Client Intel FPGA IP User Guide x
1.1. Release Information 1.2. Device Family Support 1.3. Parameters 1.4. Mailbox Client Intel® FPGA IP Core Interface Signals 1.5. Mailbox Client Intel FPGA IP Avalon® Memory-Mapped Interface 1.6. Commands and Responses 1.7. Specifying the Command and Response FIFO Depths 1.8. Enabling Cryptographic Services 1.9. Using the Mailbox Client Intel® FPGA IP 1.10. Accessing Quad SPI Flash Mailbox Client Intel FPGA IP Core Use Case Examples 1.11. Nios® II and Nios® V Processors HAL Driver 1.12. Mailbox Client Intel FPGA IP User Guide Archives 1.13. Document Revision History for the Mailbox Client Intel® FPGA IP User Guide
1.4. Mailbox Client Intel® FPGA IP Core Interface Signals x
1.4.1. Clock and Reset Interfaces 1.4.2. Avalon® Memory-Mapped Interface 1.4.3. AXI Manager Interface
1.5. Mailbox Client Intel FPGA IP Avalon® Memory-Mapped Interface x
1.5.1. Interrupt Enable Register 1.5.2. Interrupt Status Register 1.5.3. Timer Registers
1.6. Commands and Responses x
1.6.1. Operation Commands 1.6.2. Error Code Responses 1.6.3. Error Code Recovery
1.11. Nios® II and Nios® V Processors HAL Driver x
1.11.1. Mailbox Client HAL API 1.11.2. LibRSU HAL API
1.11.1. Mailbox Client HAL API x
1.11.1.1. Mailbox Client Driver API
1.11.2. LibRSU HAL API x
1.11.2.1. Configuration Parameter 1.11.2.2. Error Codes 1.11.2.3. Using LibRSU HAL API without Valid SPT or CPB 1.11.2.4. Data Type 1.11.2.5. Functions 1.11.2.6. RSU Client API
1. Mailbox Client Intel FPGA IP User Guide
2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions

1.11.1.1. Mailbox Client Driver API

Table 16.  mailbox_cliet_ope
Pototype: mailbox_cliet_ope(cost cha *ame)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet.h>
Paamete:
  • ame – chaacte poite to ame of Mailbox Cliet Itel® FPGA IP peipheal as egisteed with the HAL
Retu: Retu o-NULL if successful ad othewise etu:
  • -NULL fo ivalid agumet. Foud o device o wog iput ame
Desciptio: Retieve a poite to the Mailbox Cliet block istace. Seach fo the list of egisteed mailbox cliet istaces fo the oe with the supplied ame.
Table 17.  mailbox_cliet_sed_cmd
Pototype: mailbox_cliet_sed_cmd (itel_mailbox_cliet* fd, alt_u8 id, alt_u32 cmd, alt_u32* ag, it ag_legth, it cmd_legth, alt_u32* iput_data, alt_u32* esp_buf, alt_u32 esp_buf_le) 17
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet.h>
Paamete:
  • fd – poite to the flash device stuctue
  • id - commad ID
  • cmd - mailbox cliet commad
  • ag - mailbox cliet agumet 18
  • ag_legth - umbe of agumets
  • cmd_legth - commad legth (ag_legth + iput_data legth)
  • iput_data - iput data
  • esp_buf - espose buffe
  • es_buf_le - espose buffe legth
Retu: Retu 0 if successful ad othewise etu:
  • eo codes fo mailbox cliet i Eo Code Resposes
  • -EINVAL fo Ivalid agumet
  • -ETIME fo pollig timeout ad skippig the loop afte 5 secods
  • -EBACK_TOUT fo back pessue time iteupt 19
  • -EEOP_TOUT fo ed of packet time iteupt 20
  • -ECMD_INVLD fo ivalid commad iteupt
  • -ENOBUFS fo the espose buffe legth is isufficiet 21
  • -ENOSYS fo umatched etued commad ID fom SDM
Desciptio: Sed commads ad data to the mailbox cliet. Reads back the espose whe data valid iteupt occus.
Table 18.  mailbox_cliet_flash_ope
Pototype: mailbox_cliet_flash_ope(itel_mailbox_cliet* fd)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
  • -ENODEV fo uecogized flash device
Desciptio: Sed commad to the mailbox cliet fo QSPI ope ad QSPI chip select. Povides exclusive access to the quad SPI iteface. Detemies the QSPI flash size.
Table 19.  mailbox_cliet_flash_close
Pototype: mailbox_cliet_flash_close(itel_mailbox_cliet* fd)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
Desciptio: Sed commad to the mailbox cliet fo QSPI close. Stops the exclusive access to the quad SPI iteface.
Table 20.  mailbox_cliet_flash_get_ifo
Pototype: mailbox_cliet_flash_get_ifo(itel_mailbox_cliet* fd, flash_egio** ifo, it* umbe_of_egios)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • ifo - poite to the flash egio
  • umbe_of_egios - poite to the umbe of egios
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
  • -EIO fo possible hadwae issue
Desciptio: Povide ifomatio coespodig to CSO[0].

Retus the flash memoy offset, flash memoy size, umbe of flash device, umbe of secto, ad secto size values.
Table 21.  mailbox_cliet_flash_ead
Pototype: mailbox_cliet_flash_ead (itel_mailbox_cliet* fd, it offset, void* dest_add, it legth)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • offset - ead flash addess (ualiged access)
  • dest_add - destiatio buffe (i byte size)
  • legth - size of ead data (i byte size)
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
Desciptio: Read data fom selected addess specified by the legth i byte size. Legth is a o-zeo value.
Table 22.  mailbox_cliet_flash_ease_block
Pototype: mailbox_cliet_flash_ease_block (itel_mailbox_cliet* fd, it block_offset)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • block_offset - addess offset fom the stat of flash secto specified to be eased
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
  • -EIO fo ease failed ad secto might be potected
Desciptio: Ease a sigle flash secto.
Table 23.  mailbox_cliet_flash_wite_block
Pototype: mailbox_cliet_flash_wite_block (itel_mailbox_cliet* fd, it block_offset, it data_offset, cost void* data, it legth)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • block_offset - secto addess. Stats at the flash secto specified to be witte to
  • data_offset - byte offset (ualiged access) of wite ito memoy
  • data - data buffe to be witte (i byte size)
  • legth - size of wite data (i byte size)
Retu: Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
Desciptio: Wite oe block o secto of data ito the flash. The wite data legth caot split betwee adjacet sectos.

The fuctio assumes the addess is empty. You must ease it pio its pogammig.
Table 24.  mailbox_cliet_flash_wite
Pototype: mailbox_cliet_flash_wite (itel_mailbox_cliet* fd, it offset, cost void* sc_add, it legth)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • offset - flash addess (ualiged access) of wite to the flash memoy
  • sc_add - souce buffe (i byte size)
  • legth - size of wite data (i byte size)
Retu:
Retu 0 if successful ad othewise etu:
  • -EINVAL fo ivalid agumet
Desciptio: Pogam the data ito the flash at the selected addess. Automatically ease the block as eeded befoe pogammig.
Table 25.  mailbox_cliet_flash _ease_block
Pototype: mailbox_cliet_flash_ease_block(itel_mailbox_cliet* fd, it block_offset, it block_size)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • block_offset – addess offset fom the stat of flash secto specified to be eased
  • block_size – secto of the quad SPI device. Iput the followig value:
    • 4096 fo 4 KB secto size
    • 32768 fo 32 KB secto size
    • 65536 fo 64 KB secto size
Retu:
Retu 0 fo success ad othewise etu:
  • EINVAL fo ivalid agumet
Desciptio: Ease a sigle flash secto depeds o block size give.
Table 26.  mailbox_cliet_flash _ease
Pototype: mailbox_cliet_flash_ease(itel_mailbox_cliet* fd, it offset, it legth)
Iclude: Fo
  • Statix® 10 devices
  • Agilex™ 7 devices
<altea_s10_mailbox_cliet_flash.h>
Fo Agilex™ 5 devices <itel_mailbox_cliet_flash.h>
Paamete:
  • fd – poite to the flash device stuctue
  • offset – addess offset fom the stat of flash secto specified to be eased
  • legth – size of ease data i the multiple of 4096 bytes
Retu:
Retu 0 fo success ad othewise etu:
  • EINVAL fo ivalid agumet
Desciptio: Ease the flash accodig to the legth give
Related Ifomatio
17 Pio to Quatus® Pime Po Editio softwae vesio 21.3, the espose buffe legth (esp_buf_le) was declaed as a poite athe tha a itege.
18 Agumet epesets the paametes eeded fo mailbox cliet opeatio, ot icludig iput data.
19 The ecommeded eo code ecovey is the full system ecofiguatio.
20 The ecommeded eo code ecovey is to eset the Mailbox Cliet Itel® FPGA IP.
21 If the espose buffe legth is isufficiet, the HAL API discads the collected data fom Mailbox Cliet Itel® FPGA IP ad etu ENOBUFS.
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