Mailbox Client Intel® FPGA IPs User Guide

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ID 683290
Date 11/04/2024
Public
Document Table of Contents
Document Table of Contents x
1. Mailbox Client Intel FPGA IP User Guide 2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions
1. Mailbox Client Intel FPGA IP User Guide x
1.1. Release Information 1.2. Device Family Support 1.3. Parameters 1.4. Mailbox Client Intel® FPGA IP Core Interface Signals 1.5. Mailbox Client Intel FPGA IP Avalon® Memory-Mapped Interface 1.6. Commands and Responses 1.7. Specifying the Command and Response FIFO Depths 1.8. Enabling Cryptographic Services 1.9. Using the Mailbox Client Intel® FPGA IP 1.10. Accessing Quad SPI Flash Mailbox Client Intel FPGA IP Core Use Case Examples 1.11. Nios® II and Nios® V Processors HAL Driver 1.12. Mailbox Client Intel FPGA IP User Guide Archives 1.13. Document Revision History for the Mailbox Client Intel® FPGA IP User Guide
1.4. Mailbox Client Intel® FPGA IP Core Interface Signals x
1.4.1. Clock and Reset Interfaces 1.4.2. Avalon® Memory-Mapped Interface 1.4.3. AXI Manager Interface
1.5. Mailbox Client Intel FPGA IP Avalon® Memory-Mapped Interface x
1.5.1. Interrupt Enable Register 1.5.2. Interrupt Status Register 1.5.3. Timer Registers
1.6. Commands and Responses x
1.6.1. Operation Commands 1.6.2. Error Code Responses 1.6.3. Error Code Recovery
1.11. Nios® II and Nios® V Processors HAL Driver x
1.11.1. Mailbox Client HAL API 1.11.2. LibRSU HAL API
1.11.1. Mailbox Client HAL API x
1.11.1.1. Mailbox Client Driver API
1.11.2. LibRSU HAL API x
1.11.2.1. Configuration Parameter 1.11.2.2. Error Codes 1.11.2.3. Using LibRSU HAL API without Valid SPT or CPB 1.11.2.4. Data Type 1.11.2.5. Functions 1.11.2.6. RSU Client API
1. Mailbox Client Intel FPGA IP User Guide
2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions

1.11.1. Mailbox Client HAL API

The Mailbox Cliet HAL API is available fo this cotolle i the followig softwae files.
  • Fo Statix® 10 ad Agilex™ 7 devices:
    • altea_s10_mailbox_cliet.h
    • altea_s10_mailbox_cliet.c
    • altea_s10_mailbox_cliet_flash.h
    • altea_s10_mailbox_cliet_flash.c
  • Fo Agilex™ 5 devices:
    • itel_mailbox_cliet.h
    • itel_mailbox_cliet.c
    • itel_mailbox_cliet_flash.h
    • itel_mailbox_cliet_flash.c
These files implemet the mailbox cliet coe device dive fo the HAL system libay. The HAL dive povides exclusive fuctios o QSPI flash device-elated opeatios to simplify you desig flow.

To use the HAL API, eable altea_safeclib i the BSP Softwae Package fom BSP Edito fo Quatus® Pime Po Editio softwae vesio pio to 21.4. Ete mailbox_cliet_ope() fuctio to stat the HAL API. Note that the iteupt coectio to the pocesso is ecessay to use the HAL API.

The absolute addessig to the quad SPI memoy specifies all the offset-elated vaiables. You must complete the quad SPI opeatio by callig mailbox_cliet_flash_ope() befoe ay flash opeatio, ad mailbox_cliet_flash_close() at the ed of ay flash opeatio.


Sectio Cotet
Mailbox Cliet Dive API

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