Cyclone® V to Agilex™ 5 Device Migration Guide

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ID 787947
Date 4/01/2024
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Document Table of Contents
Document Table of Contents x
1. Overview 2. Device Migration Considerations 3. Intel Quartus Prime and Platform Designer Migration Guidelines 4. Example: Design Migration from Cyclone® V to Intel Agilex® 5 Device A. Document Revision History for Cyclone® V to Agilex™ 5 Device Migration Guide
2. Device Migration Considerations x
2.1. Device Footprint 2.2. Power Management 2.3. Configuration 2.4. Design Security Differences 2.5. Logic Elements and Embedded Memory 2.6. PLL and Clock Network 2.7. Digital Signal Processing (DSP) 2.8. I/O Interfaces 2.9. LVDS SERDES Interface 2.10. Sensor Monitoring System 2.11. MIPI D-PHY Interface 2.12. External Memory Interface (EMIF) 2.13. Hard Processor System (HPS) 2.14. Transceiver and Serial Protocols 2.15. PCIe Interface 2.16. Ethernet Interface
2.3. Configuration x
2.3.1. General Configuration Pin and Sequences 2.3.2. Device Configuration and the Secure Device Manager (SDM) 2.3.3. Active Serial (AS) Configuration 2.3.4. Avalon® -ST Configuration 2.3.5. JTAG Configuration 2.3.6. Configuration via Protocol (CvP) 2.3.7. QSPI Flash Access and Remote System Upgrade Feature 2.3.8. SEU Features 2.3.9. Configuration File Format Differences
2.8. I/O Interfaces x
2.8.1. HSIO Bank 2.8.2. HPS I/O Bank 2.8.3. SDM I/O Bank 2.8.4. HVIO Bank
2.13. Hard Processor System (HPS) x
2.13.1. HPS Boot Flows
2.14. Transceiver and Serial Protocols x
2.14.1. PMA Architecture 2.14.2. PCS Architecture 2.14.3. Transceiver Clocking 2.14.4. Transceiver Reset
3. Intel Quartus Prime and Platform Designer Migration Guidelines x
3.1. Overview 3.2. IP Comparison Between Cyclone® V and Agilex™ 5 Devices 3.3. Upgrading IP Cores and Platform Designer Systems 3.4. RTL Compliance
3.3. Upgrading IP Cores and Platform Designer Systems x
3.3.1. Upgrading IP Cores via Quartus® Prime Software Project 3.3.2. Upgrading IP Cores in Platform Designer Upgrading All IP Components in your Platform Designer System Upgrading Individual IP Components in your Platform Designer System 3.3.3. Migrating IP Cores to a Different Device
4. Example: Design Migration from Cyclone® V to Intel Agilex® 5 Device x
4.1. Prerequisites 4.2. Downloading and Extracting the Design Example 4.3. Migrating the Design Example
4.3. Migrating the Design Example x
4.3.1. Restoring an Archived Cyclone® V Design in the QAR Format 4.3.2. Specifying an Agilex™ 5 Device 4.3.3. Upgrading IP Cores 4.3.4. Establishing Connections 4.3.5. Compiling the Design
1. Overview
2. Device Migration Considerations
3. Intel Quartus Prime and Platform Designer Migration Guidelines
4. Example: Design Migration from Cyclone® V to Intel Agilex® 5 Device
A. Document Revision History for Cyclone® V to Agilex™ 5 Device Migration Guide

3.3.2. Upgrading IP Cores in Platform Designer

When you open a Platform Designer system containing outdated IP components, you can retain and use the RTL of previously generated IP components within the Platform Designer system. If the Platform Designer cannot locate the IP core’s original version, you cannot re-parametrize the IP core without upgrading the IP core to the latest version. However, Platform Designer allows you to view the parametrization of the original IP component without upgrading.

If the Platform Designer detects IP components that require regeneration, the Upgrade IP Cores dialog box appears, allowing you to upgrade outdated components. Components that you must upgrade to compile your design successfully appear in red. Status icons indicate whether a component is currently being regenerated, a component is encrypted, or that there is not enough information to determine the status of a component.

Upgrading All IP Components in your Platform Designer System

To upgrade all IP components in your Platform Designer system to the latest version, perform these steps:

  1. Click System > Upgrade IP Cores. The Upgrade IP Cores dialog box appears.
  2. Click Upgrade All to upgrade all IP components at once to the latest versions.

Upgrading Individual IP Components in your Platform Designer System

To upgrade individual IP components in your Platform Designer system to the latest version, select each IP in the Upgrade IP Cores window and click Upgrade. You can also upgrade individual IPs via the Parameters tab, using the following steps:

  1. Click View > Parameters.
  2. Select the outdated IP component in the Hierarchy or the System View tab.
  3. Select the Parameters tab. This tab displays information on the current version and the installed version of the selected IP component.
  4. Click Upgrade. Platform Designer upgrades the IP component to the installed version and deletes all the RTL files associated with the IP component. A warning message displays to inform you about the pending deletion of RTL files associated with the IP component.
Note: The Quartus® Prime software maintains a list of all IP components associated with your design on the Components tab in the Project Navigator. You cannot upgrade IP cores instantiated in the Quartus® Prime Pro Edition software version 23.2.1 to 23.4. Regenerate the instantiated IPs to proceed with your project. However, IP auto-upgrade will upgrade IPs from 23.4 to 24.1 and later releases.

For more information about upgrading IP cores in Platform Designer, refer to the "Upgrading Outdated IP Components in Platform Designer" topic in the Quartus® Prime Pro Edition User Guide: Platform Designer.

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