Visible to Intel only — GUID: mfy1639376684059
Ixiasoft
1. About the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide
2. Quick Start Guide
3. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example
4. Interface Signals Description
5. Configuration Registers Description
6. F-Tile Low Latency Ethernet 10G MAC Intel FPGA IP Design Example User Guide Archives
7. Document Revision History for the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide
Visible to Intel only — GUID: mfy1639376684059
Ixiasoft
7. Document Revision History for the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide
Document Version | Quartus® Prime Version | IP Version | Changes |
---|---|---|---|
2024.07.08 | 24.2 | 22.2.0 |
|
2023.11.29 | 23.3 | 22.0.3 |
|
2022.12.20 | 22.4 | 22.0.0 |
|
2022.06.21 | 22.2 | 20.1.0 | Added PTP support for 10M/100M/1G/2.5G/5G/10G USXGMII variant
|
2022.04.01 | 21.4.1 | 20.0.0 | Initial release. |