Visible to Intel only — GUID: ybp1602706263626
Ixiasoft
Visible to Intel only — GUID: ybp1602706263626
Ixiasoft
2.3.1.1.1. FHT Transmitter Buffer and Phase Generator
The transmitter differential I/O buffer converts the serialized bit stream to an electrical signal suitable for transmission across a cable or PCB trace. The main cursor, pre-cursor taps, and post-cursor taps of the FFE circuit control the transmitter swing strength and shape the transmitter output waveform.
The transmitter buffer can be programmed to support the taps listed in the following table. Choose the frequency response of the filter to compensate for lane impairments such as intersymbol interference (ISI), crosstalk, frequency-dependent losses, and reflections.
Parameter (Cursor) |
Description | Rule | Increment and Decrement Size |
||
---|---|---|---|---|---|
Minimum | Default | Maximum | |||
C-3 | Pre-cursor 3 | -8 | 0 | +7.75 | 0.25 |
C-2 | Pre-cursor 2 | -8 | 0 | +7.75 | 0.25 |
C-1 | Pre-cursor 1 | -16 | 0 | +15.5 | 0.5 |
C0 | Main cursor | 0 | 41.5 | +41.5 7 | 0.5 |
C+1 | Post-cursor 1 | -16 | 0 | +15.5 | 0.5 |
C+2 | Post-cursor 2 | -8 | 0 | +7.75 | 0.25 |
C+3 | Post-cursor 3 | -8 | 0 | +7.75 | 0.25 |
C+4 | Post-cursor 4 | -8 | 0 | +7.75 | 0.25 |
For the most capable transmitter equalizer and best amplitude control, where ABS is the absolute value:
- ABS(C-3) + ABS(C-2) + ABS(C-1) + C0 + ABS(C+1) + ABS(C+2) + ABS(C+3) + ABS(C+4) ≤ 41.5
- ABS(C-3) + ABS(C-2) + ABS(C-1) +ABS(C+1) + ABS(C+2) + ABS(C+3) + ABS(C+4) ≤ C0