Visible to Intel only — GUID: erh1602703955257
Ixiasoft
Visible to Intel only — GUID: erh1602703955257
Ixiasoft
2.3.2.1.4. FGT Data Pattern Generator and Verifier
The PMA supports a built-in transmitter data pattern generator for transmit characterization. The pattern and size are programmable.
NRZ | PAM4 |
---|---|
PRBS7 PRBS9 PRBS10 PRBS13 PRBS15 PRBS23 PRBS28 PRBS3110 |
QPRBS13 QPRBS31 PRBS13Q PRBS31Q SSPR SSPR1 SSPRQ |
User-defined pattern (up to 320 bits) |
The data pattern verifier contains a receiver built-in self test (BIST) bit error checker. The receiver can check standard data patterns for link verification applications by enabling the PRBS mode in both the receiver link and a compatible transmitter link connected by a common transmission path or loopback.
The PRBS31, QPRBS13, PRBS13Q, PRBS31Q, SSPR, SSPR1, and SSPRQ PRBS generator mode settings are not currently supported through the IP GUI, although present in the parameter editor. Do not select any of the unsupported PRBS generator mode settings. Specify these settings using registers.