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1. Introduction
2. Necessity of Error Correction
3. FEC Selection
4. FEC in Intel® Stratix® 10 H-Tile Devices
5. FEC in Intel® Stratix® 10 E-Tile Devices
6. FEC Implementation Using the E-Tile Channel Placement Tool
7. FEC in Practical Application
8. Hardware Results
9. Document Revision History for AN 846: Intel® Stratix® 10 Forward Error Correction
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4.1.4.2. KR FEC Encoder
FEC (2112,2080) is a FEC code specified in the IEEE 802.3 Clause 74 specification.
The code is a shortened cyclic code (2112, 2080). For each block of 2080 message bits, the encoder generates another 32 parity checks to form a total of 2112 bits. The generator polynomial is:
g(x) = x32 + x23 + x21 + x11 + x2 +1