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1. Introduction
2. Necessity of Error Correction
3. FEC Selection
4. FEC in Intel® Stratix® 10 H-Tile Devices
5. FEC in Intel® Stratix® 10 E-Tile Devices
6. FEC Implementation Using the E-Tile Channel Placement Tool
7. FEC in Practical Application
8. Hardware Results
9. Document Revision History for AN 846: Intel® Stratix® 10 Forward Error Correction
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4.1.1. FEC Block Format
The length of the FEC block is 2112 bits. Each FEC block contains 32 rows of 65 bits each; 64 bits of payload and 1-bit transcoding overhead (T bits).
At the end of each block there is 32-bit overhead or parity check bits. Transmission is from left to right within each row, and from top to bottom between rows. The payload bits carry the information symbols from the PCS layer.
T0 | 64-bit payload Word 0 | T1 | 64-bit payload Word 1 | T2 | 64-bit payload Word 2 | T3 | 64-bit payload Word 3 |
T4 | 64-bit payload Word 4 | T5 | 64-bit payload Word 5 | T6 | 64-bit payload Word 6 | T7 | 64-bit payload Word 7 |
T8 | 64-bit payload Word 8 | T9 | 64-bit payload Word 9 | T10 | 64-bit payload Word 10 | T11 | 64-bit payload Word 11 |
T12 | 64-bit payload Word 12 | T13 | 64-bit payload Word 13 | T14 | 64-bit payload Word 14 | T15 | 64-bit payload Word 15 |
T16 | 64-bit payload Word 16 | T17 | 64-bit payload Word 17 | T18 | 64-bit payload Word 18 | T19 | 64-bit payload Word 19 |
T20 | 64-bit payload Word 20 | T21 | 64-bit payload Word 21 | T22 | 64-bit payload Word 22 | T23 | 64-bit payload Word 23 |
T24 | 64-bit payload Word 24 | T25 | 64-bit payload Word 25 | T26 | 64-bit payload Word 26 | T27 | 64-bit payload Word 27 |
T28 | 64-bit payload Word 28 | T29 | 64-bit payload Word 29 | T30 | 64-bit payload Word 30 | T31 | 64-bit payload Word 31 |
32 parity bits |
Total FEC block length = (32 × 65) + 32 = 2112 bits.