Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 7/08/2024
Public
Document Table of Contents

7.2.1.5.2. Trace Length Guideline

The maximum trace length apply to both single- and multi-device AS configuration setups as listed in the following table. The trace length is the length from the Cyclone® 10 GX device to the EPCQ-L device.

Note: To evaluate the data setup (tSU) and data hold time (tDH) slack on your board in order to ensure that you are meeting the tSU and tDH requirements, Altera recommends that you follow the guideline in the Evaluating Data Setup and Hold Timing Slack section of the AN 822: Intel FPGA Configuration Device Migration Guideline.
Table 70.  Maximum Trace Length for AS x1 and x4 Configurations for Cyclone® 10 GX Devices
Cyclone® 10 GX Device AS Pins Maximum Board Trace Length (Inches)
12.5/ 25/ 50 MHz 100 MHz
DCLK 10 6
AS_DATA[3..0] 10 6
nCSO[2..0] 10 6