Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 7/08/2024
Public
Document Table of Contents

5.5.3.1. Programmable Current Strength

You can use the programmable current strength to mitigate the effects of high signal attenuation that is caused by a long transmission line or a legacy backplane.
Note:

To use programmable current strength, you must specify the current strength assignment in the Quartus® Prime Pro Edition software. Without explicit assignments, the Quartus® Prime Pro Edition software uses these predefined default values:

  • All HSTL and SSTL Class I, and all non-voltage-referenced I/O standards—50 Ω RS OCT without calibration
  • All HSTL and SSTL Class II I/O standards—25 Ω RS OCT without calibration
  • POD12 I/O standard—34 Ω RS OCT without calibration
Table 40.  Programmable Current Strength Settings for Cyclone® 10 GX DevicesThe output buffer for each Cyclone® 10 GX device I/O pin has a programmable current strength control for the I/O standards listed in this table.
I/O Standard

IOH / IOL Current Strength Setting (mA) 8

Available Default
3.0 V LVTTL/3.0 V CMOS 16, 12, 8, 4 12
2.5 V LVCMOS 16, 12, 8, 4 12
1.8 V LVCMOS 12, 10, 8, 6, 4, 2 12
1.5 V LVCMOS 12, 10, 8, 6, 4, 2 12
1.2 V LVCMOS 8, 6, 4, 2 8
SSTL-18 Class I 12, 10, 8, 6, 4 8
SSTL-18 Class II 16, 8 16
SSTL-15 Class I 12, 10, 8, 6, 4 8
SSTL-15 Class II 16, 8 16
SSTL-135 Class I 12, 10, 8, 6, 4 8
SSTL-135 Class II 16 16
SSTL-125 Class I 12, 10, 8, 6, 4 8
SSTL-125 Class II 16 16
SSTL-12 Class I 12, 10, 8, 6, 4 8
SSTL-12 Class II 16 16
POD12 16, 12, 10, 8, 6, 4 8
1.8 V HSTL Class I 12, 10, 8, 6, 4 8
1.8 V HSTL Class II 16 16
1.5 V HSTL Class I 12, 10, 8, 6, 4 8
1.5 V HSTL Class II 16 16
1.2 V HSTL Class I 12, 10, 8, 6, 4 8
1.2 V HSTL Class II 16 16
Differential SSTL-18 Class I 12, 10, 8, 6, 4 8
Differential SSTL-18 Class II 16, 8 16
Differential SSTL-15 Class I 12, 10, 8, 6, 4 8
Differential SSTL-15 Class II 16, 8 16
Differential 1.8 V HSTL Class I 12, 10, 8, 6, 4 8
Differential 1.8 V HSTL Class II 16 16
Differential 1.5 V HSTL Class I 12, 10, 8, 6, 4 8
Differential 1.5 V HSTL Class II 16 16
Differential 1.2 V HSTL Class I 12, 10, 8, 6, 4 8
Differential 1.2 V HSTL Class II 16 16
Differential SSTL-135 Class I 12, 10, 8, 6, 4 8
Differential SSTL-135 Class II 16 16
Differential SSTL-125 Class I 12, 10, 8, 6, 4 8
Differential SSTL-125 Class II 16 16
Differential SSTL-12 Class I 12, 10, 8, 6, 4 8
Differential SSTL-12 Class II 16 16
Differential POD12 16, 12, 10, 8, 6, 4 8
Note: Altera recommends that you perform IBIS or SPICE simulations to determine the best current strength setting for your specific application.
8 For I/O standards with DDR3 OCT settings, refer to On-Chip I/O Termination in Cyclone 10 GX Devices