Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook

ID 683775
Date 7/08/2024
Public
Document Table of Contents

5.7.1.3. Guideline: I/O Standards Supported for I/O PLL Reference Clock Input Pin

The I/O PLL reference clock (REFCLK) input pin supports the following I/O standards only:

  • Single-ended I/O standards
  • LVDS

Cyclone® 10 GX devices support Differential HSTL and Differential SSTL input operation using LVDS input buffers. To support the electrical specifications of Differential HSTL or Differential SSTL signaling, assign the LVDS I/O standard to the REFCLK pin in the Quartus® Prime Pro Edition software.