Visible to Intel only — GUID: lbl1440520719998
Ixiasoft
Visible to Intel only — GUID: lbl1440520719998
Ixiasoft
4. Parameters
Parameter |
Value |
Description |
---|---|---|
Design Environment |
Standalone System |
Identifies the environment that the IP is in.
|
Parameter |
Value |
Description |
---|---|---|
Application Interface Type |
Avalon-MM |
Selects the interface to the Application Layer. |
Application Interface Width |
256-bit |
Selects the width of the interface to the Application Layer. Currently, the only option available for this interface width is 256-bit .
Note: DMA operations are only supported when this parameter is set to 256-bit.
|
Hard IP Mode | Gen3x8, 256-bit interface, 250 MHz Gen3x4, 256-bit interface, 125 MHz Gen3x2, 256-bit interface, 125 MHz Gen3x1, 256-bit interface, 125 MHz Gen2x16, 256-bit interface, 250 MHz Gen2x8, 256-bit interface, 125 MHz Gen2x4, 256-bit interface, 125 MHz Gen2x2, 256-bit interface, 125 MHz Gen2x1, 256-bit interface, 125 MHz Gen1x16, 256-bit interface, 125 MHz Gen1x8, 256-bit interface, 125 MHz Gen1x4, 256-bit interface, 125 MHz Gen1x2, 256-bit interface, 125 MHz Gen1x1, 256-bit interface, 125 MHz |
Selects the following elements:
The width of the data interface between the hard IP Transaction Layer and the Application Layer implemented in the FPGA fabric.
Note: If the Mode selected is not available for the configuration chosen, an error message displays in the Message pane.
|
Port type | Native Endpoint Root Port |
Specifies the port type. The Endpoint stores parameters in the Type 0 Configuration Space. The Root Port stores parameters in the Type 1 Configuration Space. A Root Port testbench is not available in the current release. If you select the Root Port, you have to create your own testbench. |