MAX® 10 FPGA Configuration User Guide

ID 683865
Date 5/14/2025
Public

Visible to Intel only — GUID: sss1408685867411

Ixiasoft

Document Table of Contents

5.2. Dual Configuration Intel® FPGA IP Core Parameters

Table 37.  Dual Configuration Intel® FPGA IP Core Parameter for MAX® 10
Parameter Value Description
Clock frequency Up to 80 MHz Specifies the number of cycle to assert RU_nRSTIMER and RU_nCONFIG signals. Note that maximum RU_CLK is 40 MHz, the Dual Configuration Intel® FPGA IP core has restriction to run at 80 MHz maximum, which is twice faster than hardware limitation. This is because the Dual Configuration Intel® FPGA IP core generates RU_CLK at half rate of the input frequency.