L-Tile and H-Tile Avalon® Memory-mapped+ Intel® FPGA IP for PCI Express* User Guide

ID 683527
Date 9/13/2024
Public
Document Table of Contents

2. Quick Start Guide

Using Quartus® Prime Pro Edition, you can generate a simple DMA design example for the Intel L-/H-Tile Avalon-MM+ for PCI Express IP. The generated design example reflects the parameters that you specify. It automatically creates the files necessary to simulate and compile in the Quartus® Prime Pro Edition software. You can download the compiled design to the Stratix® 10 Development Board. To download to custom hardware, update the Quartus® Prime Pro Edition Settings File (.qsf) with the correct pin assignments .

Figure 3. Development Steps for the Design Example