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6.5.1. User-Defined Push Buttons
The Arria® 10 GX FPGA development board includes user-defined push buttons. When you press and hold down the button, the device pin is set to logic 0; when you release the button, the device pin is set to logic 1. There are no board-specific functions for these general user push buttons.
Board Reference |
Schematic Signal Name |
FPGA Pin Number |
I/O Standard |
---|---|---|---|
S1 |
USER_PB2 |
U11 |
1.8 V |
S2 |
USER_PB1 |
U12 |
1.8 V |
S3 |
USER_PB0 |
T12 |
1.8 V |
S4 |
CPU_RESETn |
BD27 |
1.8 V |
S5 |
PGM_SEL |
— |
2.5 V |
S6 |
PGM_CONFIG |
— |
2.5 V |
S7 |
MAX_RESETn |
— |
2.5 V |