Visible to Intel only — GUID: bhc1412754209765
Ixiasoft
6.5.6. SDI Video Input/Output Ports
The Arria® 10 GX FPGA development board includes a SDI video port, which consists of a M23428G-33 cable driver and a M23544G-14 cable equalizer. The PHY devices from Macom interface to single-ended SMB connectors.
SD_HD Input |
Supported Output Standards |
Rise Time |
---|---|---|
0 |
SMPTE 424M, SMPTE 292M |
Faster |
1 |
SMPTE 259M |
Slower |
Board Reference |
Schematic Signal Name |
FPGA Pin Number |
I/O Standard |
---|---|---|---|
14 |
SDI_AVDD |
— |
— |
2 |
SDI_AVDD |
— |
— |
7 |
SDI_AVDD |
— |
— |
9 |
SDI_SD_HDN |
AW34 |
1.8 V |
5 |
SDI_TX_RSET |
— |
— |
1 |
SDI_TXCAP_N |
D43 |
High Speed Differential I/O |
16 |
SDI_TXCAP_P |
D44 |
High Speed Differential I/O |
10 |
SDI_TXDRV_N |
— |
— |
11 |
SDI_TXDRV_P |
— |
— |
Cable Type |
Data Rate (Mbps) |
Maximum Cable Length (m) |
---|---|---|
Belden 1694A |
270 |
400 |
Belden 1694A |
1485 |
140 |
Belden 1694A |
2970 |
120 |
Board Reference |
Schematic Signal Name |
FPGA Pin Number |
I/O Standard |
---|---|---|---|
9 |
AGCN |
— |
— |
8 |
AGXP |
— |
— |
10 |
MF0_BYPASS |
AW32 |
1.8 V |
19 |
MF1_AUTO_SLEEP |
AY32 |
1.8 V |
21 |
MF2_MUTE |
AY35 |
1.8 V |
22 |
MF3_XSD |
— |
— |
6 |
MODE_SEL |
— |
— |
11 |
MUTEREF |
— |
— |
4 |
SDI_EQIN_N1 |
— |
— |
3 |
SDI_EQIN_P1 |
— |
— |
14 |
SDO_N / SDI_RX_N |
H39 |
High Speed Differential I/O |
15 |
SDO_P / SDI_RX_P |
H40 |
High Speed Differential I/O |