Arria® 10 FPGA Development Kit User Guide

ID 683526
Date 5/15/2024
Public
Document Table of Contents

6.7.7. I2C

I2C supports communication between integrated circuits on a board. It is a simple two-wire bus that consists of a serial data line (SDA) and a serial clock (SCL). The MAX V and Arria® 10 devices use the I2C for reading and writing to the character LCD. You can use the Arria® 10 or MAX V as the I2C host to access the PLLs and clocks.

Figure 34. I2C Block Diagram
Table 38.  MAX V I2C Signals
Schematic Signal Name Pin Number I/O Standard Description
CLOCK_I2C_SCL C12 2.5 V I2C serial clock from MAX V.
CLOCK_I2C_SDA C10 2.5 V I2C serial data from MAX V.
Table 39.  MAX V I2C Level Shifter Signals to Arria® 10 FPGA
Schematic Signal Name Arria® 10 Pin Number I/O Standard Description
CLOCK_SCL AN30 1.8 V Arria® 10 FPGA I2C serial clock from MAX V level shifter.
CLOCK_SDA AV33 1.8 V Arria® 10 FPGA I2C serial data from MAX V level shifter.
Table 40.   Arria® 10 I2C Signals
Schematic Signal Name Pin Number I/O Standard Description
DISP_I2C_SCL AW33 1.8 V Arria® 10 I2C serial clock to level shifter.
DISP_I2C_SDA AY34 1.8 V Arria® 10 I2C serial data to level shifter.
Table 41.   Arria® 10 I2C Level Shifter to LCD Signals
Schematic Signal Name LCD Pin Number I/O Standard Description
I2C_SCL_DISP 7 5.0 V LCD I2C serial clock from Arria® 10 FPGA level shifter.
I2C_SDA_DISP 8 5.0 V LCD I2C serial data from Arria® 10 FPGA level shifter.