Visible to Intel only — GUID: joc1463678958228
Ixiasoft
Intel® Stratix® 10 Devices and Transceiver Channels
PCB Stackup Selection Guideline
Recommendations for High Speed Signal PCB Routing
FPGA Fan-out Region Design
CFP2/CFP4 Connector Board Layout Design Guideline
QSFP+/zSFP/QSFP28 Connector Board Layout Design Guideline
SMA 2.4-mm Layout Design Guideline
Tyco/Amphenol Interlaken Connector Design Guideline
Electrical Specifications
Document Revision History for AN 766: Intel® Stratix® 10 Devices, High Speed Signal Interface Layout Design Guideline
Option 1: Via-In-Pad Topology
Option 2: Dog-bone with GND Cutout at BGA Pad Topology
Option 3: Micro-via Topology
GND Cutout Under BGA Pads in Fan-out Configuration
Comparison of Dog-bone with GND Cutout Under the BGA and Via-in-Pad Configurations
Trace Shape Routing at the BGA Void Area (Tear Drop Configuration)
Visible to Intel only — GUID: joc1463678958228
Ixiasoft
Interlaken Interface Specification
Interlaken interface electrical specifications can be found in Interlaken Interoperability Recommendations.
This document focuses on Interlaken interface recommendations for typical applications up to 400 Gbps packet transfer. It also shows the connector and cable assembly channel and contributed differential insertion loss. The end to end interoperability loss budget can also be found in this document as the required specification in channel design process.
Related Information