ID
683132
Date
3/12/2019
Public
Visible to Intel only — GUID: joc1462382877559
Ixiasoft
Intel® Stratix® 10 Devices and Transceiver Channels
PCB Stackup Selection Guideline
Recommendations for High Speed Signal PCB Routing
FPGA Fan-out Region Design
CFP2/CFP4 Connector Board Layout Design Guideline
QSFP+/zSFP/QSFP28 Connector Board Layout Design Guideline
SMA 2.4-mm Layout Design Guideline
Tyco/Amphenol Interlaken Connector Design Guideline
Electrical Specifications
Document Revision History for AN 766: Intel® Stratix® 10 Devices, High Speed Signal Interface Layout Design Guideline
Option 1: Via-In-Pad Topology
Option 2: Dog-bone with GND Cutout at BGA Pad Topology
Option 3: Micro-via Topology
GND Cutout Under BGA Pads in Fan-out Configuration
Comparison of Dog-bone with GND Cutout Under the BGA and Via-in-Pad Configurations
Trace Shape Routing at the BGA Void Area (Tear Drop Configuration)
Visible to Intel only — GUID: joc1462382877559
Ixiasoft
Intel® Stratix® 10 Devices, High Speed Signal Interface Layout Design Guideline
This high speed signal interface design guideline helps you design best-in-class board layouts for high speed signals operating up to 28 Gbps.
These guidelines are based on the latest results of 3D board layout simulations and measurement.There are test coupons to validate this guideline methodology and evaluate the recommended layout guideline properly. Intel recommends that you read this guideline thoroughly and perform pre-layout and post-layout 3D simulations to confirm that your channel meets specifications.
Note: The content in this application note is based on currently available simulations and measurement data. It is subject to change pending new data. In the future revisions we will also focus on other high speed interfaces and backplane board layout design guidelines.
- Intel Stratix 10 Devices and Transceiver Channels
- PCB Stackup Selection Guideline
- Recommendations for High Speed Signal PCB Routing
- FPGA Fan-out Region Design
- CFP2/CFP4 Connector Board Layout Design Guideline
- QSFP+/zSFP/QSFP28 Connector Board Layout Design Guideline
- SMA 2.4-mm Layout Design Guideline
- Tyco/Amphenol Interlaken Connector Design Guideline
- Electrical Specifications
- Document Revision History for AN 766: Intel Stratix 10 Devices, High Speed Signal Interface Layout Design Guideline