Visible to Intel only — GUID: pil1685725547371
Ixiasoft
Visible to Intel only — GUID: pil1685725547371
Ixiasoft
3.1.11. 2288055: DTR flags not cleared on external debugger access while leaving Debug state
Description
The Data Transfer Registers (DTRs) provide a mechanism to transfer data between an external debugger and the core. They consist of write-only registers to transmit data (DBGDTRTX_EL0 and DBGDTRTXint), read-only registers to receive data (DBGDTRRX_EL0 and DBGDTRRXint), and associated data control flags.
Due to this erratum, if these registers are accessed by the external debugger while the debug exit procedure is in progress, then the accesses will go ahead but the flow control flags will not be updated correctly.
Conditions
- The debugger requests a debug exit.
- The debugger does an external access to the DBGDTRRX/ DBGDTRTX, while the debug exit is ongoing.
- Certain microarchitectural timing conditions are met.
Impact
For an external read to DBGDTRTX, the EDSCR.TXU and EDSCR.TXfull flags will not be updated.
For an external write to DBGDTRRX, the write will be ignored and the EDSCR.RXO and EDSCR.Rxfull flags will not be updated.
Workaround
There is no workaround for this erratum.
Category
Category C