Device Migration Guidelines: Agilex™ 5 FPGAs and SoCs E-Series

ID 813955
Date 7/26/2024
Public
Document Table of Contents

3.2. LVDS SERDES

The LVDS SERDES IP supports different data rates across speed grades within Agilex™ 5 E-series Device Group A and Device Group B. If you are planning to migrate your design across device groups, you need to pre-plan your design by selecting the data rate range supported by both devices.

For example,
  • -2 Speed Grade supported Fmax = 1600 Mbps
  • -3 Speed Grade supported Fmax = 1250 Mbps
If you migrate your design from -2 speed grade to -3 speed grade devices, you need to limit the data rate by 1250 Mbps or lower than -3 speed grade supported Fmax.

The LVDS SERDES IP supports multiple I/O standards, features, and data rates in Agilex™ 5 E-Series devices. There is no change needed when Quartus® Prime design migration happens between Agilex™ 5 E-Series devices if the supported I/O standards, features, and data rates within Agilex™ 5 E-Series devices are identical.

Refer to the LVDS SERDES User Guide: Agilex™ 5 FPGAs and SoCs for more information regarding the I/O standards and features for Agilex™ 5 E-Series devices.

Refer to the Agilex™ 5 FPGAs and SoCs Device Data Sheet for more information regarding supported data rate for Agilex™ 5 E-Series devices.