Device Migration Guidelines: Agilex™ 5 FPGAs and SoCs E-Series

ID 813955
Date 7/26/2024
Public
Document Table of Contents

1. Introduction

This application note provides migration guidelines for Agilex™ 5 E-Series devices. The guidelines covers various device features to help you plan your Quartus® Prime software and board design up front to ensure seamless migration between devices within the same package.

Figure 1.  Agilex™ 5 E-Series Device Group A
Figure 2.  Agilex™ 5 E-Series Device Group B
Note: Refer to the Agilex™ 5 FPGAs and SoCs Device Overview for Ordering Part Number (OPN) Structure details.
Figure 3. Package Options, Migrations, and I/O Pins
  • The arrows indicate the package migration paths. The shades represent the devices included in each path.
  • To achieve full I/O1 migration across devices in the same migration path, restrict I/Os and transceivers utilization to match the device with the lowest I/O and transceiver counts.
1
  • HSIO – High-speed I/O
  • HVIO – High voltage I/O
  • LVDS – Low voltage differential signaling channels