F-Tile 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP User Guide

ID 720989
Date 2/23/2022
Public

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5. 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP Parameters

You can select the 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP core for Intel® Agilex™ F-tile devices from the Intel® Quartus® Prime Pro Edition IP catalog. To customize the PHY IP core, specify the parameters in the IP parameter editor.
Figure 9.  1G/2.5G/5G/10G Multi-rate Ethernet PHY IP Parameter Editor
Table 14.   1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP Core Parameters
Parameter Options Description
External PHY
Connect to NBASE-T PHY On

This parameter is enabled by default as only 10M/100M/1G/2.5G/5G/10G (USXGMII) mode is supported and the external PHY must be NBASE-T compatible.

PHY Options
Speed

10M/100M/1G/2.5G/5G/10G (USXGMII)

The operating speed of the PHY.
Transceiver Options
PMA reference frequency

156.250000

312.500000

322.265625

Specify the frequency of the reference clock to PMA from system PLL (i_clk_ref).