F-Tile 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP User Guide

ID 720989
Date 2/23/2022
Public

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4.4. IEEE 802.3 Clause 37 Auto-Negotiation

This module receives 32-bit XGMII with data valid from RX 64/32 width adaptor at 322.265625 MHz, and output 32-bit auto-negotiation data in a format shown in the following table at 312.5 MHz. The received XGMII data are decoded to extract the auto-negotiation config words from auto-negotiation message. The received AN config words are processed by the auto-negotiation engine described in IEEE 802.3 Clause 37.
Table 13.  USXGMII Auto-Negotiation Message
Lane XGMII Control XGMII Data
0 0x1 0x9C
1 0x0 Config [15:8]
2 0x0 Config [7:0]
3 0x0 Auto-Neg Opcode (Cisco)

0x03