F-Tile 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP User Guide

ID 720989
Date 2/23/2022
Public

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Document Table of Contents

2.2. Features

Table 4.   1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP Core Features
Feature Description
Operating speeds 10M, 100M, 1G, 2.5G, 5G, and 10G.
MAC-side interface 32-bit XGMII for 10M/100M/1G/2.5G/5G/10G (USXGMII/NBASE-T).
Network-side interface 10.3125 Gbps for 10M/100M/1G/2.5G/5G/10G (USXGMII/NBASE-T).
Avalon® Memory-Mapped ( Avalon® -MM) interface Provides access to the configuration registers of the PHY.
Physical Coding Sublayer (PCS) function USXGMII PCS for 10M/100M/1G/2.5G/5G/10G (USXGMII).
Auto-negotiation

USXGMII Auto-negotiation supported in the 10M/100M/1G/2.5G/5G/10G (USXGMII/NBASE-T) configuration.