Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Public
Document Table of Contents

3.7.2. Guarantee Kernel Clock Timing

The OpenCL Kernel Clock Generator works together with a script that the Intel® Quartus® Prime database interface executable (quartus_cdb) runs after every Intel® Quartus® Prime software compilation as a post-flow script.

The following setting in the base.qsf and top.qsf files invokes the <path_to_s5_net>/hardware/s5_net/scripts/post_flow.tcl Tcl script in the Stratix® V Network Reference Platform after every Intel® Quartus® Prime software compilation using quartus_cdb:

set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_cdb:scripts/post_flow.tcl"

Within this script, the following statement calls the OpenCL™ script to determine and configure the kernel clock to a functional frequency:

source $::env(INTELFPGAOCLSDKROOT)/ip/board/bsp/adjust_plls.tcl

where INTELFPGAOCLSDKROOT points to the path to the Intel® FPGA SDK for OpenCL™ installation.

Important: Ensure that this flow executes during every Intel® Quartus® Prime software compilation of an OpenCL kernel.