Intel® Cyclone® 10 LP FPGA Evaluation Kit User Guide

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ID 683580
Date 12/19/2019
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Evaluation Board Setup 4. Evaluation Board Components 5. Simple Socket Server 6. Board Test System A. Safety and Regulatory Information B. Additional Information
1. Overview x
1.1. Evaluation Kit Description 1.2. Recommended Operating Conditions 1.3. Handling the Board 1.4. Evaluation Board Revisions
1.1. Evaluation Kit Description x
1.1.1. Evaluation Board Description 1.1.2. Evaluation Kit Collateral 1.1.3. Power Supply Description
2. Getting Started x
2.1. Installing Quartus Prime Software 2.2. Installing the Evaluation Kit Collateral 2.3. Installing Intel® FPGA Download Cable Driver
3. Evaluation Board Setup x
3.1. Powering Up the Evaluation Board 3.2. Default Switch Settings 3.3. Recovering Factory Default Settings
4. Evaluation Board Components x
4.1. Board Overview 4.2. Intel® Cyclone® 10 LP FPGA Overview 4.3. MAX 10 System Controller Overview 4.4. FPGA Configuration 4.5. Status Elements 4.6. Setup Elements 4.7. General User Input/Output 4.8. Clocks 4.9. Connectors and Interfaces 4.10. Memory 4.11. System Power
4.4. FPGA Configuration x
4.4.1. Using the Quartus Prime Programmer 4.4.2. Program On-Board EPCQ or EPCQ-A Flash Memory 4.4.3. Active Serial Configuration
4.9. Connectors and Interfaces x
4.9.1. Gigabit Ethernet PHY 4.9.2. 2x20 GPIO Expansion Header 4.9.3. Arduino Connectors 4.9.4. Pmod Connectors
4.9.3. Arduino Connectors x
4.9.3.1. Digital IOs 4.9.3.2. Analog Inputs 4.9.3.3. Arduino Power
4.10. Memory x
4.10.1. HyperRAM 4.10.2. EPCQ or EPCQ-A Flash Memory
4.11. System Power x
4.11.1. Power Supply Options 4.11.2. Power Tree 4.11.3. Current Measurement
5. Simple Socket Server x
5.1. Connecting to the Simple Socket Server
6. Board Test System x
6.1. The Configure Menu 6.2. The System Info Tab 6.3. The GPIO Tab 6.4. The Flash Tab 6.5. The HyperRAM Tab 6.6. The Power Monitor 6.7. The Clock Control
A. Safety and Regulatory Information x
A.1. Safety Warnings A.2. Safety Cautions
B. Additional Information x
B.1. Revision History B.2. Compliance and Conformity Statements
1. Overview
2. Getting Started
3. Evaluation Board Setup
4. Evaluation Board Components
5. Simple Socket Server
6. Board Test System
A. Safety and Regulatory Information
B. Additional Information

4.7. General User Input/Output

Table 11.  DIP Switches
Board Reference Schematic Signal Name FPGA Signal Name Description
SW1.3 USER_DIP0 U1.M16 User-defined Switch0
SW1.2 USER_DIP1 U1.A8 User-defined Switch1
SW1.1 USER_DIP2 U1.A9 User-defined Switch2
Table 12.  Push Buttons
Board Reference Schematic Signal Name FPGA Signal Name Description
S3 USER_PB0 U1.E15 User-defined PB0
S4 USER_PB1 U1.F14 User-defined PB1
S5 USER_PB2 U1.C11 User-defined PB2
S6 USER_PB3 U1.D9 User-defined PB3
Table 13.  LEDs
Board Reference Schematic Signal Name FPGA Signal Name Color Description
D6 USER_LED0 U1.L14 Green User-defined LED0, active low
D7 USER_LED1 U1.K15 Green User-defined LED1, active low
D8 USER_LED2 U1.J14 Green User-defined LED2, active low
D9 USER_LED3 U1.J13 Green User-defined LED3, active low
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