Intel® Cyclone® 10 LP FPGA Evaluation Kit User Guide

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ID 683580
Date 12/19/2019
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Evaluation Board Setup 4. Evaluation Board Components 5. Simple Socket Server 6. Board Test System A. Safety and Regulatory Information B. Additional Information
1. Overview x
1.1. Evaluation Kit Description 1.2. Recommended Operating Conditions 1.3. Handling the Board 1.4. Evaluation Board Revisions
1.1. Evaluation Kit Description x
1.1.1. Evaluation Board Description Featured Devices Programming and Configuration Memory Devices Communication Ports Clock Circuits Power Supply 1.1.2. Evaluation Kit Collateral 1.1.3. Power Supply Description
2. Getting Started x
2.1. Installing Quartus Prime Software 2.2. Installing the Evaluation Kit Collateral 2.3. Installing Intel® FPGA Download Cable Driver
3. Evaluation Board Setup x
3.1. Powering Up the Evaluation Board 3.2. Default Switch Settings 3.3. Recovering Factory Default Settings
4. Evaluation Board Components x
4.1. Board Overview 4.2. Intel® Cyclone® 10 LP FPGA Overview 4.3. MAX 10 System Controller Overview 4.4. FPGA Configuration 4.5. Status Elements 4.6. Setup Elements 4.7. General User Input/Output 4.8. Clocks 4.9. Connectors and Interfaces 4.10. Memory 4.11. System Power
4.4. FPGA Configuration x
4.4.1. Using the Quartus Prime Programmer 4.4.2. Program On-Board EPCQ or EPCQ-A Flash Memory 4.4.3. Active Serial Configuration
4.9. Connectors and Interfaces x
4.9.1. Gigabit Ethernet PHY 4.9.2. 2x20 GPIO Expansion Header 4.9.3. Arduino Connectors 4.9.4. Pmod Connectors
4.9.3. Arduino Connectors x
4.9.3.1. Digital IOs 4.9.3.2. Analog Inputs 4.9.3.3. Arduino Power
4.10. Memory x
4.10.1. HyperRAM 4.10.2. EPCQ or EPCQ-A Flash Memory
4.11. System Power x
4.11.1. Power Supply Options 4.11.2. Power Tree 4.11.3. Current Measurement
5. Simple Socket Server x
5.1. Connecting to the Simple Socket Server
6. Board Test System x
6.1. The Configure Menu 6.2. The System Info Tab 6.3. The GPIO Tab 6.4. The Flash Tab 6.5. The HyperRAM Tab 6.6. The Power Monitor 6.7. The Clock Control
A. Safety and Regulatory Information x
A.1. Safety Warnings A.2. Safety Cautions
B. Additional Information x
B.1. Revision History B.2. Compliance and Conformity Statements
1. Overview
2. Getting Started
3. Evaluation Board Setup
4. Evaluation Board Components
5. Simple Socket Server
6. Board Test System
A. Safety and Regulatory Information
B. Additional Information

1.1.1. Evaluation Board Description

The evaluation kit includes a RoHS and CE compliant Intel® Cyclone® 10 LP FPGA Evaluation Board with the following components.

Featured Devices

  • Intel® Cyclone® 10 LP FPGA (10CL025, U256 package)
  • Intel® Enpirion® EN5329QI/EN5339QI - 2A/3A PowerSoC Low Profile Synchronous Buck DC-DC Converter with Integrated Inductor
  • Intel® Enpirion® EP5358xUI 600 mA PowerSoC DC-DC Step-Down Converters with Integrated Inductor
  • Intel® XWAY PHY11G Gigabit Ethernet PHY PEF7071
  • Intel® MAX® 10 FPGA 10M08SAU169C8G (Embedded Intel® FPGA Download Cable II and System Management)

Programming and Configuration

  • Embedded Intel® FPGA Download Cable II (JTAG)
  • Optional JTAG direct through 10-pin header
  • Active Serial x1 configuration from EPCQ or EPCQ-A flash

Memory Devices

  • 128 megabit (Mb) 8-bit HyperRAM with HBMC (Hyperbus Memory Controller) IP provided by Synaptic Labs
  • Flash memory:
    • Rev A1 board: 64 Mb EPCQ
    • Rev A2 board: 128 Mb EPCQ-A

Communication Ports

  • One Gigabit Ethernet (GbE) RJ-45 port
  • One 2x20 GPIO Expansion Header
  • One Arduino UNO R3 type connectors
  • One 12-pin Digilent Pmod compatible connector

Clock Circuits

  • Silicon Labs Si510 50 MHz crystal oscillator
  • Silicon Labs Si5351 clock generator with programmable frequency GUI

Power Supply

  • USB Y-cable (USB Type-A to mini Type-B) for both on-board Intel® FPGA Download Cable II and 5 V power supply from USB port
  • Supplemental 5 V DC power adapter option (5 V power adapter and cord are not included in the kit)
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