Multi Channel DMA Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683517
Date 7/30/2024
Public
Document Table of Contents

2.6.1. Simulation Results

The simulation below was run with P-Tile MCDMA IP.

Figure 12. Simulation Log
Figure 13. Simulation Waveform 1The simulation was run with MCDMA P-Tile.
Figure 14. Simulation Waveform 2The simulation was run with MCDMA P-Tile.