AN 943: Thermal Modeling for Intel® Stratix® 10 FPGAs with the Intel® FPGA Power and Thermal Calculator

ID 683387
Date 3/29/2021
Public

2. Introduction

An Intel® Stratix® 10 device has a multi-chip package structure. It can contain between two and nine dies. One or two dies always comprise the main FPGA core fabric, and there can be from one to six transceiver dies, and up to two High Bandwidth Memory (HBM) dies. Due to complex construction and non-uniform power density of the dies, the thermal engineering of an Intel® Stratix® 10 device requires a specific process and familiarity with the following: