AN 701: Scalable Low Latency Ethernet 10G MAC using Intel Arria 10 1G/10G PHY

ID 683343
Date 11/06/2017
Public
Document Table of Contents

IEEE 1588v2 Timestamp Interface Signals

The following table lists the IEEE 1588v2 timestamp interface signals. These interface signals are only applicable to design examples with IEEE 1588v2.

Table 11.   IEEE 1588v2 Timestamp Interface Signals
Signal Direction Width Description
tx_egress_timestamp_96b_valid[] output [NUM_CHANNELS] When asserted, this signal qualifies the timestamp on tx_egress_timestamp_96b_data[] for the transmit frame whose fingerprint is specified by tx_egress_timestamp_96b_fingerprint[].
tx_egress_timestamp_96b_data[][] output [NUM_CHANNELS][96] Carries the 96-bit egress timestamp in the following format:
  • Bits 48 to 95: 48-bit seconds field
  • Bits 16 to 47: 32-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
tx_egress_timestamp_96b_fingerprint[][] output [NUM_CHANNELS][TSTAMP_FP_WIDTH]

The fingerprint of the transmit frame, which is received on tx_egress_timestamp_request_data[]. This fingerprint specifies the transmit frame the egress timestamp on tx_egress_timestamp_96b_data[] is for.

tx_egress_timestamp_64b_valid[] output [NUM_CHANNELS] When asserted, this signal qualifies the timestamp on tx_egress_timestamp_64b_data[] for the transmit frame whose fingerprint is specified by tx_egress_timestamp_64b_fingerprint[].
tx_egress_timestamp_64b_data[][] output [NUM_CHANNELS][64] Carries the 64-bit egress timestamp in the following format:
  • Bits 16 to 63: 48-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
tx_egress_timestamp_64b_fingerprint[][] output [NUM_CHANNELS][TSTAMP_FP_WIDTH]

The fingerprint of the transmit frame, which is received on tx_egress_timestamp_request_data[]. This fingerprint specifies the transmit frame the egress timestamp on tx_egress_timestamp_64b_data[] is for.

rx_ingress_timestamp_96b_valid[] output [NUM_CHANNELS] When asserted, this signal qualifies the timestamp on rx_ingress_timestamp_96b_data[]. The MAC IP core asserts this signal in the same clock cycle it asserts avalon_st_rx_startofpacket.
rx_ingress_timestamp_96b_data[][] output [NUM_CHANNELS][96] Carries the 96-bit ingress timestamp in the following format:
  • Bits 48 to 95: 48-bit seconds field
  • Bits 16 to 47: 32-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field
rx_ingress_timestamp_64b_valid[] output [NUM_CHANNELS] When asserted, this signal qualifies the timestamp on rx_ingress_timestamp_64b_data[]. The MAC IP core asserts this signal in the same clock cycle it asserts avalon_st_rx_startofpacket.
rx_ingress_timestamp_64b_data[][] output [NUM_CHANNELS][64] Carries the 64-bit ingress timestamp in the following format:
  • Bits 16 to 63: 48-bit nanoseconds field
  • Bits 0 to 15: 16-bit fractional nanoseconds field