Stratix® 10 Device Family Pin Connection Guidelines

ID 683028
Date 8/26/2024
Public
Document Table of Contents

Stratix® 10 P-Tile Pins

This section contains connection guidelines that are specific to the Stratix® 10 P-tile devices. The connection guidelines for the Stratix® 10 core pins are listed in the Stratix® 10 Core Pins section.
Note: You cannot change the P-tile IP for the PCI Express* ( PCIe* ) pin allocation in the Quartus® Prime project, but the P-tile IP for the PCIe* supports lane reversal and polarity inversion on the PCB.